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GE UR Series Instruction Manual Page 458

Line differential relay.
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F.3 TABLES AND FIGURES
APPENDIX F
Figure 3–31: TIMING CONFIGURATION FOR RS422 2 CHANNEL - 3 TERMINAL APPLICATION .............................................. 3-26
Figure 3–32: CLOCK AND DATA TRANSITIONS ............................................................................................................................ 3-27
Figure 3–33: RS422 & FIBER INTERFACE CONFIGURATION ...................................................................................................... 3-28
Figure 3–34: G.703 & FIBER INTERFACE CONFIGURATION........................................................................................................ 3-28
Figure 4–1: URPC SOFTWARE MAIN WINDOW............................................................................................................................... 4-3
Figure 4–2: UR HORIZONTAL FACEPLATE PANELS ...................................................................................................................... 4-4
Figure 4–3: UR VERTICAL FACEPLATE PANELS ............................................................................................................................ 4-4
Figure 4–4: LED PANEL 1 .................................................................................................................................................................. 4-5
Figure 4–5: LED PANELS 2 AND 3 (INDEX TEMPLATE) .................................................................................................................. 4-6
Figure 4–6: LED PANEL 2 (DEFAULT LABEL) .................................................................................................................................. 4-6
Figure 4–7: LED PANEL CUSTOMIZATION TEMPLATES (EXAMPLE)............................................................................................ 4-8
Figure 4–8: KEYPAD .......................................................................................................................................................................... 4-8
Figure 5–1: BREAKER-AND-A-HALF SCHEME................................................................................................................................. 5-5
Figure 5–2: THERMAL DEMAND CHARACTERISTIC..................................................................................................................... 5-19
Figure 5–3: DISTURBANCE DETECTOR LOGIC DIAGRAM .......................................................................................................... 5-27
Figure 5–4: EXAMPLE USE OF SOURCES ..................................................................................................................................... 5-28
Figure 5–5: CHARGING CURRENT COMPENSATION CONFIGURATIONS ................................................................................. 5-29
Figure 5–6: DUAL BREAKER CONTROL SCHEME LOGIC ............................................................................................................ 5-33
Figure 5–7: UR ARCHITECTURE OVERVIEW ................................................................................................................................ 5-35
Figure 5–8: EXAMPLE LOGIC SCHEME ......................................................................................................................................... 5-43
Figure 5–9: LOGIC EXAMPLE WITH VIRTUAL OUTPUTS ............................................................................................................. 5-44
Figure 5–10: LOGIC FOR VIRTUAL OUTPUT 3 .............................................................................................................................. 5-44
Figure 5–11: LOGIC FOR VIRTUAL OUTPUT 4 .............................................................................................................................. 5-45
Figure 5–12: FLEXLOGIC™ WORKSHEET ..................................................................................................................................... 5-45
Figure 5–13: FLEXLOGIC™ EQUATION & LOGIC FOR VIRTUAL OUTPUT 3 .............................................................................. 5-46
Figure 5–14: FLEXLOGIC™ EQUATION & LOGIC FOR VIRTUAL OUTPUT 4 .............................................................................. 5-47
Figure 5–15: FLEXELEMENT™ SCHEME LOGIC........................................................................................................................... 5-50
Figure 5–16: FLEXELEMENT™ DIRECTION, PICKUP, AND HYSTERESIS .................................................................................. 5-51
Figure 5–17: FLEXELEMENT™ INPUT MODE SETTING ............................................................................................................... 5-51
Figure 5–18: CURRENT DIFFERENTIAL SCHEME LOGIC ............................................................................................................ 5-56
Figure 5–19: STUB BUS SCHEME LOGIC ...................................................................................................................................... 5-58
Figure 5–20: LINE PICKUP LOGIC .................................................................................................................................................. 5-59
Figure 5–21: MEMORY VOLTAGE LOGIC....................................................................................................................................... 5-60
Figure 5–22: MHO DISTANCE CHARACTERISTIC......................................................................................................................... 5-62
Figure 5–23: QUAD DISTANCE CHARACTERISTIC....................................................................................................................... 5-62
F
Figure 5–24: MHO DISTANCE CHARACTERISTIC SAMPLE SHAPES.......................................................................................... 5-63
Figure 5–25: QUAD DISTANCE CHARACTERISTIC SAMPLE SHAPES........................................................................................ 5-63
Figure 5–26: PHASE DISTANCE Z2 OP SCHEME .......................................................................................................................... 5-65
Figure 5–27: PHASE DISTANCE Z2 SCHEME LOGIC .................................................................................................................... 5-66
Figure 5–28: GROUND DISTANCE Z2 OP SCHEME ...................................................................................................................... 5-70
Figure 5–29: GROUND DIRECTIONAL SUPERVISION SCHEME LOGIC – Z2 ............................................................................. 5-70
Figure 5–30: GROUND DISTANCE Z2 SCHEME LOGIC ................................................................................................................ 5-71
Figure 5–31: POWER SWING DETECT ELEMENT OPERATING CHARACTERISTICS................................................................ 5-74
Figure 5–32: POWER SWING DETECT LOGIC (1 of 2) .................................................................................................................. 5-74
Figure 5–33: POWER SWING DETECT LOGIC (2 of 2) .................................................................................................................. 5-75
Figure 5–34: LOAD ENCROACHMENT CHARACTERISTIC ........................................................................................................... 5-78
Figure 5–35: LOAD ENCROACHMENT APPLIED TO DISTANCE ELEMENT ................................................................................ 5-79
Figure 5–36: LOAD ENCROACHMENT SCHEME LOGIC ............................................................................................................... 5-79
Figure 5–37: VOLTAGE RESTRAINT CHARACTERISTIC FOR PHASE TOC................................................................................ 5-87
Figure 5–38: PHASE TOC1 SCHEME LOGIC.................................................................................................................................. 5-87
Figure 5–39: PHASE IOC1 SCHEME LOGIC................................................................................................................................... 5-88
Figure 5–40: PHASE A DIRECTIONAL POLARIZATION ................................................................................................................. 5-89
Figure 5–41: PHASE DIRECTIONAL SCHEME LOGIC ................................................................................................................... 5-91
Figure 5–42: NEUTRAL TOC1 SCHEME LOGIC ............................................................................................................................. 5-92
Figure 5–43: NEUTRAL IOC1 SCHEME LOGIC .............................................................................................................................. 5-93
Figure 5–44: NEUTRAL DIRECTIONAL VOLTAGE-POLARIZED CHARACTERISTICS ................................................................ 5-96
Figure 5–45: NEUTRAL DIRECTIONAL OC1 SCHEME LOGIC ...................................................................................................... 5-98
Figure 5–46: GROUND TOC1 SCHEME LOGIC .............................................................................................................................. 5-99
Figure 5–47: GROUND IOC1 SCHEME LOGIC ............................................................................................................................. 5-100
Figure 5–48: NEGATIVE SEQUENCE TOC1 SCHEME LOGIC .................................................................................................... 5-101
Figure 5–49: NEGATIVE SEQUENCE IOC1 SCHEME LOGIC...................................................................................................... 5-102
Figure 5–50: BREAKER FAILURE MAIN PATH SEQUENCE ........................................................................................................ 5-105
Figure 5–51: BREAKER FAILURE 1-POLE [INITIATE] (Sheet 1 of 2) ........................................................................................... 5-108
Figure 5–52: BREAKER FAILURE 1-POLE (TIMERS) [Sheet 2 of 2] ............................................................................................ 5-109
Figure 5–53: BREAKER FAILURE 3-POLE [INITIATE] (Sheet 1 of 2) ........................................................................................... 5-110
F-8
L90 Line Differential Relay
GE Power Management

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