Access To On-Chip Peripheral Modules - Hitachi HD6473867 Hardware Manual

2.6.2 Access to On-Chip Peripheral Modules

On-chip peripheral modules are accessed in two states or three states. The data bus width is 8 bits,
so access is by byte size only. This means that for accessing word data, two instructions must be
used. Figures 2-12 and 2-13 show the on-chip peripheral module access cycle.
Two-state access to on-chip peripheral modules
ø or ø
SUB
Internal address bus
Internal read signal
Internal data bus
(read access)
Internal write signal
Internal data bus
(write access)
Figure 2-12 On-Chip Peripheral Module Access Cycle (2-State Access)
Bus cycle
T state
1
Address
Read data
Write data
43
T state
2