Nest Memory Management Unit (Nmmu); Integrated Switch Router (Isr) - IBM Power Systems 775 Manual

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Figure 1-8 CAU packets sent by CAU
1.4.4 Nest memory management unit
The Nest Memory Management Unit (NMMU) that is in the hub check facilitates user-level
code to operate on the address space of processes that executes on other compute nodes.
The NMMU enables user-level code to create a global address space from which the NMMU
performs operations. This facility is called
A process that executes on a compute node registers its address space, thus permitting
interconnect packets to manipulate the registered shared region directly. The NMMU
references a page table that maps effective addresses to real memory. The hub chip also
maintains a cache of the mappings and maps the entire real memory of most installations.
Incoming interconnect packets that reference memory, such as RDMA packets and packets
that perform atomic operations, contain an effective address and information that pinpoints
the context in which to translate the effective address. This feature greatly facilitates
global-address space languages, such as Unified Parallel C (UPC), co-array Fortran, and
X10, by permitting such packets to contain easy-to-use effective addresses.
1.4.5 Integrated switch router
The integrated switch router (ISR) replaces the external switching and routing functions that
are used in prior networks. The ISR is designed to dramatically reduce cost and improve
performance in bandwidth and latency.
A direct graph network topology connects up to 65,536 POWER7 eight-core processor chips
with two-level routing hierarchy of L and D busses.
Proc, ... Proc,
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Chapter 1. Understanding the IBM Power Systems 775 Cluster
Proc,
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