IBM Power Systems 775 Manual page 133

For aix and linux hpc solution
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Support for the HFI global counter of the IBM POWER7 server, which replaced the global
counter of the high performance switch as a time source.
A new messaging API called PAMI, which replaces the LAPI interface that is used in
earlier versions of Parallel Environment. In addition to providing point-to-point messaging
support, PAMI provides support for collective communications. This collective support is
used by PE MPI when it is appropriate. LAPI is still supported by PE, but its use is
deprecated, and users must migrate to PAMI.
A new run queue-based co-scheduler, in addition to the POE priority adjustment
co-scheduler. The run queue-based co-scheduler uses features of AIX 7.1 and the
POWER7 architecture to minimize the impact of jitter on user applications.
Compliance with all requirements of the Message Passing Interface 2.2 standard,
including the revisions that are listed in the Annex B Change-Log. The Partition Manager
daemon (PMD) is now a setuid (set-userid-on-exec) program, which is owned by only the
root user.
This section focus on the enhancement for Power 775 cluster systems that have HFI, CAU,
and some run jobs with large numbers of tasks.
2.4.1 Considerations for using HFI
The HFI provides the non-coherent interface between a POWER7 chip quad (QCM: 32-way
SMP consisting of four POWER7 chips) and the clustered network. Figure 2-5 on page 120
shows two instances of HFI in a hub chip. The HFIs also attach to the CAU.
Each HFI includes one PowerBus command and four PowerBus data interfaces. The
PowerBus directly connects to the processors and memory controllers of four POWER7 chips
via the WXYZ links. PowerBus also indirectly coherently connects to the other POWER7
chips within a 256-way drawer via the local links (LL). Although fully supported by the HFI
hardware, this path provides reduced performance. Each HFI has four ports to the Integrated
Switch Router (ISR). The ISR connects to other Hub chips through the D, LL, and local
remote (LR) links. The collection of ISRs and D, LL, and LR links that interconnect then form
the cluster nework.
The building block of cluster systems is a set of four POWER7 chips, its associated memory,
and a hub chip. The cluster systems consist of multiple building blocks, and are connected to
one another via the cluster network.
Chapter 2. Application integration
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