IBM Power Systems 775 Manual page 22

PLLs
22b
M0A
14b
22b
M0B
14b
22b
M0C
14b
22b
M0D
14b
PSI
JTAG/FSI
POR
I2C
ViDBUS
I2C
SEEPROM
SMP Interconnect
Figure 1-2 POWER7 chip layout
Figure 1-3 on page 9 shows the POWER7 core structure.
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IBM Power Systems 775 for AIX and Linux HPC Solution
HUB Attach
SMP Interconnect
EI – 3 PHY's
C1 C1
Core Core
PBE
L2 L2
4MB L3 4MB L3
NCU
NCU
Power Bus
MC0
PSI
4MB L3 4MB L3
NCU
NCU
L2 L2
C1 C1
PBE
Core Core
EI – 3 PHY's
SMP Data Only
GX1 GX0
C1 C1
Core Core
L2 L2
4MB L3 4MB L3
NCU NCU
MC1
A/D HTM ICP
4MB L3 4MB L3
NCU NCU
L2 L2
C1 C1
Core Core
SMP Interconnect
22b
M1A
14b
22b
M1B
14b
22b
M1C
14b
22b
M1D
14b