Xilinx SP605 Hardware User's Manual page 54

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Chapter 1:
SP605 Evaluation Board
Table 1-28
Appendix B, VITA 57.1 FMC LPC Connector
Table 1-28: VITA 57.1 FMC LPC Connections
J63 FMC
Schematic Net Name
LPC Pin
C2
FMC_DP0_C2M_P
C3
FMC_DP0_C2M_N
C6
FMC_DP0_M2C_P
C7
FMC_DP0_M2C_N
C10
FMC_LA06_P
C11
FMC_LA06_N
C14
FMC_LA10_P
C15
FMC_LA10_N
C18
FMC_LA14_P
C19
FMC_LA14_N
C22
FMC_LA18_CC_P
C23
FMC_LA18_CC_N
C26
FMC_LA27_P
C27
FMC_LA27_N
C30
IIC_SCL_MAIN
C31
IIC_SDA_MAIN
G2
FMC_CLK1_M2C_P
G3
FMC_CLK1_M2C_N
G6
FMC_LA00_CC_P
G7
FMC_LA00_CC_N
G9
FMC_LA03_P
G10
FMC_LA03_N
G12
FMC_LA08_P
G13
FMC_LA08_N
G15
FMC_LA12_P
G16
FMC_LA12_N
G18
FMC_LA16_P
G19
FMC_LA16_N
54
shows the VITA 57.1 FMC LPC connections. The connector pinout is in
U1 FPGA
J63 FMC
Pin
LPC Pin
D1
B16
D4
A16
D5
D15
D8
C15
D9
D4
D11
D5
D12
H10
D14
H11
D15
C17
D17
A17
D18
T12
D20
U12
D21
AA10
D23
AB10
D24
T21
D26
R22
D27
E16
H2
F16
H4
G9
H5
F10
H7
B18
H8
A18
H10
B20
H11
A20
H13
H13
H14
G13
H16
C5
H17
A5
H19
www.xilinx.com
Pinout.
Schematic Net Name
FMC_PWR_GOOD_FLASH_RST_B
FMC_GBTCLK0_M2C_P
FMC_GBTCLK0_M2C_N
FMC_LA01_CC_P
FMC_LA01_CC_N
FMC_LA05_P
FMC_LA05_N
FMC_LA09_P
FMC_LA09_N
FMC_LA13_P
FMC_LA13_N
FMC_LA17_CC_P
FMC_LA17_CC_N
FMC_LA23_P
FMC_LA23_N
FMC_LA26_P
FMC_LA26_N
FMC_PRSNT_M2C_L
FMC_CLK0_M2C_P
FMC_CLK0_M2C_N
FMC_LA02_P
FMC_LA02_N
FMC_LA04_P
FMC_LA04_N
FMC_LA07_P
FMC_LA07_N
FMC_LA11_P
FMC_LA11_N
FMC_LA15_P
SP605 Hardware User Guide
UG526 (v1.9) February 14, 2019
U1 FPGA
Pin
V13
E12
F12
F14
F15
C4
A4
F7
F8
G16
F17
Y11
AB11
U9
V9
U14
U13
Y16
H12
G11
G8
F9
C19
A19
B2
A2
H14
G15
D18

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