Xilinx SP605 Hardware User's Manual page 20

Chapter 1: SP605 Evaluation Board
X-Ref Target - Figure 1-4
Table 1-6: SPI x4 Memory Connections
Notes:
1. Not a U1 FPGA pin
See the Winbond Serial Flash Memory Data Sheet for more information.
See the XPS Serial Peripheral Interface Data Sheet (DS570) for more information.
20
U32
DIN, DOUT, CCLK
SPI x4
Flash
Memory
SPIX4_CS_B
Winbond
W25Q64FVSFIG
Figure 1-4: SPI Flash Interface Topology
U1 FPGA
Schematic Net Name
Pin
AB2 FPGA_PROG_B
T14 FPGA_D2_MISO3
R13 FPGA_D1_MISO2_R
AA3 SPI_CS_B
AB20 FPGA_MOSI_CSI_B_MISO0
AA20 FPGA_D0_DIN_MISO_MISO1
Y20 FPGA_CCLK
–
–
(1)
J46.2 SPIX4_CS_B
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U1
FPGA SPI Interface
2 1
ON = SPI X4 U32
OFF = SPI EXT. J17
SPI Select
Jumper
SPI MEM U32
Pin #
–
1
9
–
15
8
16
– –
– –
7
J17
SPI_CS_B
J46
SPI Program
Header
UG526_04_020819
SPI HDR J17
Pin Name Pin # Pin Name
– 1
IO3_HOLD_B 2
IO2_WP_B 3
– 4
DIN 5
IO1_DOUT 6
CLK 7
– 8
– 9 VCC3V3
CS_B –
[Ref 16]
[Ref 4]
SP605 Hardware User Guide
UG526 (v1.9) February 14, 2019
–
–
–
TMS
TDI
TDO
TCK
GND
–