Xilinx SP605 Hardware User's Manual page 35

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Table 1-15: Ethernet PHY Connections (Cont'd)
See the Marvell Alaska Gigabit Ethernet Transceivers product page
LogiCORE™ IP Tri-Mode Ethernet MAC User Guide (UG138)
SP605 Hardware User Guide
UG526 (v1.9) February 14, 2019
U1 FPGA Pin
Schematic Net Name
U22
PHY_RXD7
AB7
PHY_TXC_GTPCLK
L20
PHY_TXCLK
U8
PHY_TXER
T8
PHY_TXCTL_TXEN
U10
PHY_TXD0
T10
PHY_TXD1
AB8
PHY_TXD2
AA8
PHY_TXD3
AB9
PHY_TXD4
Y9
PHY_TXD5
Y12
PHY_TXD6
W12
PHY_TXD7
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Detailed Description
U46 M88E111
Pin Number
Pin Name
120
RXD7
14
GTXCLK
10
TXCLK
13
TXER
16
TXEN
18
TXD0
19
TXD1
20
TXD2
24
TXD3
25
TXD4
26
TXD5
28
TXD6
29
TXD7
[Ref 20]
[Ref 7]
for more information.
and the
35

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