Xilinx SP605 Hardware User's Manual page 40

Chapter 1: SP605 Evaluation Board
Table 1-20: IIC Memory Connections
See the ST Micro M24C08 Data Sheet for more information.
In addition, see the Xilinx XPS IIC Bus Interface Data Sheet (DS606).
40
U1 FPGA Pin Schematic Netname
Not Applicable Tied to GND
Not Applicable Tied to GND
Not Applicable Pulled up (0Ω) to VCC3V3
R22 IIC_SDA_MAIN
T21 IIC_SCL_MAIN
Not Applicable Tied to GND
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IIC Memory U4
Pin Number Pin Name
1 A0
2 A1
3 A2
5 SDA
6 SCL
7 WP
[Ref 21]
[Ref 8]
SP605 Hardware User Guide
UG526 (v1.9) February 14, 2019