Xilinx SP605 Hardware User's Manual page 30

Hide thumbs Also See for SP605:
Table of Contents

Advertisement

Chapter 1:
SP605 Evaluation Board
Table 1-10: GTP SMA Clock Connections
30
U1 FPGA Pin
Schematic Net Name
C9
SMA_RX_N
D9
SMA_RX_P
A8
SMA_TX_N
B8
SMA_TX_P
D11
SMA_REFCLK_N
C11
SMA_REFCLK_P
www.xilinx.com
SMA Pin
J35.1
J34.1
J33.1
J32.1
J36.1
J37.1
SP605 Hardware User Guide
UG526 (v1.9) February 14, 2019

Advertisement

Table of Contents
loading

Table of Contents