Omron SYSMAC CV Series Operation Manual page 90

Basic Ladder Diagrams
LOAD and LOAD NOT
AND and AND NOT
0000
00
OR and OR NOT
0000
00
0001
00
0002
00
78
The first condition that starts any logic block within a ladder diagram corre-
sponds to a LOAD or LOAD NOT instruction. Each of these instructions is written
on one line of mnemonic code. "Instruction" is used as a dummy instruction in the
following examples and could be any of the right-hand instructions described lat-
er in this manual.
0000
00
A LOAD instruction.
0000
00
A LOAD NOT instruction.
When this is the only condition on the instruction line, the execution condition for
the instruction at the right is ON when the execution condition is ON. For the
LOAD instruction (i.e., a normally open condition), an ON execution condition
would be produced when CIO 000000 was ON; for the LOAD NOT instruction
(i.e., a normally closed condition), an ON execution condition would be pro-
duced when CIO 000000 was OFF.
When two or more conditions lie in series on the same instruction line, the first
one corresponds to a LOAD or LOAD NOT instruction, and the rest of the condi-
tions correspond to AND or AND NOT instructions. The following example
shows three conditions which correspond in order from the left to a LOAD, an
AND NOT, and an AND instruction. Again, each of these instructions is written
on one line of mnemonic code.
0001 0002
00 00
The instruction would have an ON execution condition only when CIO 000000
was ON, CIO 000100 was OFF, and CIO 000200 was ON.
AND instructions in series can be considered individually, with each taking the
logical AND of the execution condition produced by the preceding instruction
and the status of the AND instruction's operand bit. If both of these are ON, an
ON execution condition will be produced for the next instruction. If either is OFF,
the resulting execution condition will also be OFF.
Each AND NOT instruction in a series would take the logical AND between the
execution condition produced by the preceding instruction and the inverse of its
operand bit.
When two or more conditions lie on separate instruction lines running in parallel
and then joining together, the first condition corresponds to a LOAD or LOAD
NOT instruction; the rest of the conditions correspond to OR or OR NOT instruc-
tions. The following example shows three conditions which correspond in order
from the top to a LOAD NOT, an OR NOT, and an OR instruction. Again, each of
these instructions requires one line of mnemonic code.
Address Instruction
00000 LD
00001 Instruction
00002 LD NOT
00003 Instruction
Address Instruction
Instruction
00000 LD
00001 AND NOT
00002 AND
00003 Instruction
Address Instruction
Instruction
00000 LD NOT
00001 OR NOT
00002 OR
00003 Instruction
Section 4-3
Operands
000000
000000
Operands
000000
000100
000200
Operands
000000
000100
000200