Interrupt Control - Omron SYSMAC CV Series Operation Manual

Interrupt Control

A50013
A20000 A20401
A20400
A20001 A20002

5-31 Interrupt Control

382
(156)
MCRO 010 0000 0100
(156)
MCRO 010 0002 0105
(156)
MCRO 010 0005 0120
(156)
MCRO 010 0010 0150
(150)
SBN 010
A20400
A20401
(152)
RET
Interrupts cause a break in the flow of the main program execution such that the
flow can be resumed from that point after completion of the interrupt program.
Interrupt programs should be entered in SFC if SFC programming is being used.
Interrupt programs are written as a ladder program only if the program type is
ladder.
Note Be sure to include an END(01) instruction at the end of interrupt programs if the
program type is ladder.
There are three instructions that control and monitor I/O interrupts and sched-
uled interrupts, MSKS(153), CLI(154), and MSKR(155). MSKS(153) masks in-
terrupts from Interrupt Input Units (so that they are recorded but ignored) and
sets the time interval for scheduled interrupts, CLI(154) clears interrupts, and
MSKR(155) writes either the current mask status of a designated Interrupt Input
Unit or the current scheduled interrupt interval into a designated word.
The four types of interrupts, I/O, scheduled, power OFF, and power ON are de-
scribed briefly below.
An I/O interrupt is caused by an input signal from an Interrupt Input Unit.
Up to four Interrupt Input Units (0 to 3) can be mounted on the CPU Rack and
Expansion CPU Racks. Each Unit is allocated one I/O word.
Section 5-31
Address Instruction Operands
00000 LD A50013
00001 MCRO(156)
00002 MCRO(156)
00003 MCRO(156)
00004 MCRO(156)
00005 SBN(150)
00006 LD A20000
00007 OR A20400
00008 AND A20401
00009 OUT A20400
00010 LD A20001
00011 AND A20002
00012 OUT A20401
00013 RET(152)
010
0000
0100
010
0002
0105
010
0005
0120
010
0010
0150
010