Double Bcd Multiply: Mull(076) - Omron SYSMAC CV Series Operation Manual

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BCD Calculation Instructions
Example
0000
TR0
03
A500
04
A500
04
1221
00

5-18-9 DOUBLE BCD MULTIPLY: MULL(076)

Ladder Symbol
(076)
MULL
Md
Variations
j MULL(076)
Description
Precautions
The following example works much like that for single-word subtraction. In this
example, however, the 8-digit number in CIO 0121 and CIO 0120 is subtracted
from the 8-digit number in CIO 0201 and CIO 0200 when CIO 000003 is ON, and
the result is output to D00101 and D00100. If the result is negative, the comple-
ment is then subtracted from 0 to yield the actual number and CIO bit 002100 (a
self-holding bit) is turned ON to indicate the negative result.
(075)
SUBL
1220
1200
(041)
BSET
#0000
D00000
(075)
SUBL
D00000
D00100
Mr
R
When the execution condition is OFF, MULL(076) is not executed. When the
execution condition is ON, MULL(076) multiplies the 8-digit content of Md and
Md+1 by the content of Mr and Mr+1, and places the result in R to R+3.
x
R + 3
R + 2
Note With version-2 CVM1 CPUs, mathematics instructions can use symbols. The
instructions corresponding to MUL(072) and MULL(076) are
BL(425).
*
Md, Md+1, Mr, and Mr+1 must be BCD.
(079)
CLC
First
subtraction
D00100
D00001
(079)
CLC
Second
subtraction
D00100
1221
00
Turned ON to
indicate nega-
tive result.
Operand Data Areas
st
Md: 1
multiplicand wd CIO, G, A, T, C, #, DM
st
Mr: 1
multiplier word CIO, G, A, T, C, #, DM
st
R: 1
result word
CIO, G, A, DM
Md + 1
Md
Mr + 1
Mr
R + 1
R
Section 5-18
Address
Instruction
Operands
00000
LD
000003
00001
OUT
00002
CLC(079)
00003
SUBL(075)
D00100
00004
AND
A50004
00005
BSET(041)
#0000
D00000
D00001
00006
CLC(079)
00007
SUBL(075)
D00000
D00100
D00100
00008
LD
00009
AND
A50004
00010
OR
122100
00011
OUT
122100
B(424) and
*
TR0
1220
1200
TR0
257

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