Introduction - Omron SYSMAC CV Series Operation Manual

Introduction

3-1

Introduction

Area PC
CIO Area All
(Core I/O)
Temporary All
Relay Area
CPU Bus All
Link Area
Auxiliary All
Area
Transition CV500
Area
CV1000/CV2000
Step Area CV500
CV1000/CV2000
Timer Area CV500/
CVM1-CPU01-EV2
CV1000/CV2000/
CVM1-CPU11-EV2
CVM1-CPU21-EV2
Counter CV500/
Area CVM1-CPU01-EV2
CV1000/CV2000/
CVM1-CPU11-EV2
CVM1-CPU21-EV2
DM Area CV500/
CVM1-CPU01-EV2
CV1000/CV2000/
CVM1-CPU11-EV2
CVM1-CPU21-EV2
EM Area CV1000/CV2000
CVM1-CPU21-EV2
Index All
registers
Data All
registers
Various types of data are required to achieve effective and correct control. To
facilitate managing this data, the PC is provided with various memory areas
for data, each of which performs a different function. The areas generally ac-
cessible by the user for use in programming are classified as data areas.
Details, including the name, range, and function of each area are summa-
rized in the following table. The PC memory addresses are shown in paren-
theses. These memory address are used for indirect addressing. Refer to
3-11 DM and EM Areas and to 5-3 Data Areas, Definers, and Flags for de-
tails on indirect addressing.
Range
Words: CIO 0000 to CIO 2555
Bits: CIO 000000 to CIO 255515
($0000 to $09FB)
TR0 to TR7 (bits only)
($09FF)
Words: G000 to G255
Bits: G00000 to G25515
($0A00 to $0AFF)
Words: A000 to A511
Bits: A00000 to A51115
($0B00 to $0CFF)
TN0000 to TN0511
($0D00 to $0D1F)
TN0000 to TN1023 ($0D00 to $0D3F)
ST0000 to ST0511 ($0E00 to $0E1F)
ST0000 to ST1023 ($0E00 to $0E3F)
T0000 to T0511
(Completion Flags: $0F00 to $0F1F
Present Values: $1000 to $11FF)
T0000 to T1023
(Completion Flags: $0F00 to $0F3F
Present Values: $1000 to $13FF)
C0000 to C0511
(Completion Flags: $0F80 to $0F9F
Present Values: $1800 to $19FF)
C0000 to C1023
(Completion Flags: $0F80 to $0FBF
Present Values: $1800 to $1BFF)
D00000 to D08191 ($2000 to $3FFF)
D00000 to D24575 ($2000 to $7FFF)
E00000 to E32765 for each bank; 2,
4, or 8 banks ($8000 to $8FFD)
IR0 to IR2
DR0 to DR2
Function
The CIO (Core I/O) Area is divided into
eight sections, five controlling I/O and three
used to store and manipulate data
internally.
Refer to 3-3 CIO (Core I/O) Area for details.
Used to temporarily store execution
conditions. TR bits are not input when
programming directly in ladder diagrams,
and are used only when programming in
mnemonic form.
G000 is the PC Status Area; G001 to G004,
the Clock Area. G008 to G127 contain PC
output bits; G128 to G255, CPU Bus Unit
output bits.
Contains flags and bits with special
functions.
Transition Flags for the transitions in the
SFC program.
Step Flags for steps in the SFC program. A g
step is active when its flag is ON. i i h i fl
Used to define timers (normal, high-speed,
and totalizing) and to access Completion
Flags, PV, and SV.
Used to define counters (normal, reversible,
and transition) and to access Completion
Flags, PV, and SV.
Used for internal data storage and
manipulation.
EM functions just like DM. An Extended
Data Memory Unit must be installed.
Used for indirect addressing.
Generally used for indirect addressing.
Section 3-1
g
i ON
35