Headers And Test Connectors - Lattice Semiconductor iCE40LP8K-USBC-EVN User Manual

Headers and Test Connectors

Figure 2 shows the top view of the demo board. The numbers of headers and test connectors which provide
access to USB Type-C Demo Kit V2 Board circuits are indicated.
Figure 2. Top View of the USB Type-C Demo Kit V2 Board with Headers and Test Connectors
(SW3)
Table 1 provides the detailed definition of the headers and test connectors.
Table 1. Headers and Test Connectors
Part
J1 External JTAG I/F
J3 JTAG/SPI Selection
J16 JTAG/I2C Selection
SW1 MachXO2 Reset Switch
J17 Jumper for DP Power
J5 BB Device Programmer I/F
SW2 Board Power Switch
J7 VBUS Sink Connector
SW3 General Purpose Input Switch
J9 USB Role Selection
J10 MachXO2 I/O HIZ Enable
J15 For Testing/Probing
J12 MachXO2 I/O Direction Input
J20 For Testing/Probing
J18 External I2C I/F
J19 External AGG Inputs
J1 J3 J7 J20
J18 J16 J9 J19
Description
USB Type-C Demo Kit V2 Board
J12
SW2
J15
Setting Options
1-2 (SPI), 2-3 (JTAG)
1-2 (JTAG), 2-3 (I2C)
Open-Off, Short-On
Left-On, Right-Off
Open-Off, Short-On
1-2 (UFP), 2-3 (DFP)
1-2 (Enable), 2-3 (Disable)
1-2 (Input), 2-3 (Output)
4
J10
SW1
J17
J5
Default Setting
JTAG
JTAG
Open
Right
Open
Open
Open
Open