Pinout For Swd - Segger J-Link User Manual

10.1.2 Pinout for SWD

The J-Link and J-Trace JTAG connector is also com-
patible to ARM's Serial Wire Debug (SWD).
*On later J-Link products like the J-link ULTRA,
these pins are reserved for firmware extension pur-
poses. They can be left open or connected to GND in
normal debug environment. They are not essential
for JTAG/SWD in general.
The following table lists the J-Link / J-Trace SWD
pinout.
PIN SIGNAL
1 VTref
Not con-
2
nected
3 Not Used NC
5 Not used NC
7 SWDIO
9 SWCLK
11 Not used NC
13 SWO
15 RESET
17 Not used NC
5V-Sup-
19
ply
Table 10.3: J-Link / J-Trace SWD pinout
Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND in J-Link. They
should also be connected to GND in the target system.
J-Link / J-Trace (UM08001)
TYPE
This is the target reference voltage. It is used to check if
the target has power, to create the logic-level reference for
Input the input comparators and to control the output logic levels
to the target. It is normally fed from Vdd of the target board
and must not have a series resistor.
NC This pin is not connected in J-Link.
This pin is not used by J-Link. If the device may also be
accessed via JTAG, this pin may be connected to nTRST,
otherwise leave open.
This pin is not used by J-Link. If the device may also be
accessed via JTAG, this pin may be connected to TDI, other-
wise leave open.
Single bi-directional data pin. A pull-up resistor is required.
I/O
ARM recommends 100 kOhms.
Clock signal to target CPU.
It is recommended that this pin is pulled to a defined state
Output
on the target board. Typically connected to TCK of target
CPU.
This pin is not used by J-Link when operating in SWD mode.
If the device may also be accessed via JTAG, this pin may
be connected to RTCK, otherwise leave open.
Serial Wire Output trace port. (Optional, not required for
Input
SWD communication.)
Target CPU reset signal. Typically connected to the RESET
I/O pin of the target CPU, which is typically called "nRST",
"nRESET" or "RESET".
This pin is not connected in J-Link.
This pin can be used to supply power to the target hard-
ware. Older J-Links may not be able to supply power on this
Output pin. For more information about how to enable/disable the
power supply, please refer to Target power supply on
page 276.
VTref
Not used
Not used
SWDIO
SWCLK
Not used
SWO
RESET
Not used
5V-Supply
Description
© 2004-2013 SEGGER Microcontroller GmbH & Co. KG
275
1 2
NC
3 4 GND
5 6
GND
7 8
GND
9 10
GND
11 12
GND
13 14 GND*
15 16 GND*
17 18 GND*
19 20
GND*