At91Sam9 - Segger J-Link User Manual

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RDI Sample
SetJTAGSpeed(30);
Reset(0, 0);
Write32(0xFFFFFD00, 0xA5000004);
Write32(0xFFFFFD44, 0x00008000);
Write32(0xFFFFFC20, 0x00000601);
Delay(200);
Write32(0xFFFFFC2C, 0x00191C05);
Delay(200);
Write32(0xFFFFFC30, 0x00000007);
Write32(0xFFFFFF60, 0x00320300);
SetJTAGSpeed(12000);
9.2.2

AT91SAM9

9.2.2.1 JTAG settings
We recommend using adaptive clocking.
This information is applicable to the following devices:
AT91RM9200
AT91SAM9260
AT91SAM9261
AT91SAM9262
AT91SAM9263
J-Link / J-Trace (UM08001)
// Set JTAG speed to 30 kHz
// Perform peripheral reset
// Disable watchdog
// Set PLL
// Set PLL and divider
// Select master clock and processor clock
// Set flash wait states
© 2004-2013 SEGGER Microcontroller GmbH & Co. KG
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