Reset (Cortex-M3 Based Devices); Lpc288X Flash Programming; Lpc43Xx - Segger J-Link User Manual

9.11.1.2 RDI
J-Link comes with a device-based RDI license for NXP LPC21xx-LPC24xx devices. This
means the J-Link RDI software can be used with LPC21xx-LPC24xx devices free of
charge. For more information about device-based licenses, please refer to License
types on page 49.

9.11.2 Reset (Cortex-M3 based devices)

For Cortex-M3 based NXP LPC devices the reset itself does not differ from the one for
other Cortex-M3 based devices: After the device has been reset, the core is halted
before any instruction is performed. For the Cortex-M3 based LPC devices this means
the CPU is halted before the bootloader which is mapped at address 0 after reset.
The user should write the memmap register after reset, to ensure that user flash is
mapped at address 0. Moreover, the user have to correct the Stack pointer (R13) and
the PC (R15) manually, after reset in order to debug the application.

9.11.3 LPC288x flash programming

In order to use the LPC288x devices in combination with the J-Link flash download
feature, the application you are trying to debug, should be linked to the original flash
@ addr 0x10400000. Otherwise it is user's responsibility to ensure that flash is re-
mapped to 0x0 in order to debug the application from addr 0x0.

9.11.4 LPC43xx:

All devices of the LPC43xx are dual core devices (One Cortex-M4 core and one Cor-
tex-M0 core). For these devices, a J-Link script file is needed (exact file depends on if
the Cortex-M4 or the Cortex-M0 shall be debugged) in order to guarantee proper
functionality.
Script file can be found at $JLINK_INST_DIR$\Samples\JLink\Scripts
For more information about how to use J-Link script files, please refer to Executing J-
Link script files on page 172.
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