Embedded Trace Macrocell (Etm); Trigger Condition; Code Tracing And Data Tracing; J-Trace Integration Example - Iar Embedded Workbench For Arm - Segger J-Link User Manual

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11.2 Embedded Trace Macrocell (ETM)

Embedded Trace Macrocell (ETM) provides comprehensive debug and trace facilities
for ARM processors. ETM allows to capture information on the processor's state with-
out affecting the processor's performance. The trace information is exported immedi-
ately after it has been captured, through a special trace port.
Microcontrollers that include an ETM allow detailed program execution to be recorded
and saved in real time. This information can be used to analyze program flow and
execution time, perform profiling and locate software bugs that are otherwise very
hard to locate. A typical situation in which code trace is extremely valuable, is to find
out how and why a "program crash" occurred in case of a runaway program count.
A debugger provides the user interface to J-Trace and the stored trace data. The
debugger enables all the ETM facilities and displays the trace information that has
been captured. J-Trace is seamlessly integrated into the IAR Embedded Workbench®
IDE. The advanced trace debugging features can be used with the IAR C-SPY debug-
ger.

11.2.1 Trigger condition

The ETM can be configured in software to store trace information only after a specific
sequence of conditions. When the trigger condition occurs the trace capture stops
after a programmable period.

11.2.2 Code tracing and data tracing

Code trace
Code tracing means that the processor outputs trace data which contain information
about the instructions that have been executed at last.
Data trace
Data tracing means that the processor outputs trace data about memory accesses
(read / write access to which address and which data has been read / stored). In
general, J-Trace supports data tracing, but it depends on the debugger if this option
is available or not. Note that when using data trace, the amount of trace data to be
captured rises enormously.
11.2.3 J-Trace integration example - IAR Embedded Work-
bench for ARM
In the following a sample integration of J-Trace and the trace functionality on the
debugger side is shown. The sample is based on IAR's Embedded Workbench for ARM
integration of J-Trace.
J-Link / J-Trace (UM08001)
© 2004-2013 SEGGER Microcontroller GmbH & Co. KG
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