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Table 2-4: Common Interface Signals (Cont'd)
Signal Name
sys_clk
interrupt
soft_reset
LogiCORE IP SMPTE 2022-5/6 RX v4.0
PG033 October 1, 2014
Direction
Width
In
1
Out
1
Out
1
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Description
System clock
Reserved
Core reset generated from specific control register bit
Chapter 2: Product Specification
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