Master Status 2 - Omron CJ1W-DRM21 Operation Manual

Machine automation controller cj-series, nj-series cpu unit
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3 Data Exchange with the CPU Unit
3-2-8

Master Status 2

The following device variables for CJ-series Unit indicate the status of master I/O allocations.
Information of MstrIOAlocSta (Master I/O Allocation Status) can be referenced from *_Mstr2Sta (Master
Status 2).
Master I/O Allocation Status Codes and Allocation Statuses
Code
16#00
16#01
16#02
16#03
16#11
16#12
16#13
16#20
16#30
16#80
Name of device variable for
CJ-series Unit
*_ Mstr2Sta
Name of device variable for
CJ-series Unit
*_ MstrIOAlocSta
3-38
Unit starting up
Fixed allocation status 1 (with the scan list disabled)
Fixed allocation status 2 (with the scan list disabled)
Fixed allocation status 3 (with the scan list disabled)
Fixed allocation status 1
Fixed allocation status 2
Fixed allocation status 3
User-set allocations set with device variable for CJ-series Unit
User-set allocations set by CX-Integrator
Master function disabled
Type
WORD
Type
BYTE
CJ-series DeviceNet Units Operation Manual for NJ-series CPU Unit(W497)
Details
R/W
Area
R
Master Sta-
Bits 00 to 07: Reserved by system
tus 2
Bits 08 to 15: Master I/O Allocation Status
Default: 16#0000
R/W
Area
R
Master I/O
Master I/O Allocation Status
Allocation
Data range: 16#00 to 03, 16#11 to 13,
Status
16#20, 16#30, 16#80
Default: 16#00
Function
Function

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