Bxor Bit Xor - Samsung S3C80A5B User Manual

8-bit cmos
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S3C80A5B
BXOR
— Bit XOR
BXOR
dst,src.b
BXOR
dst.b,src
dst(0) ← dst(0) XOR src(b)
Operation:
or
dst(b) ← dst(b) XOR src(0)
The specified bit of the source (or the destination) is logically exclusive-ORed with bit zero (LSB) of
the destination (or source). The result bit is stored in the specified bit of the destination. No other
bits of the destination are affected. The source is unaffected.
Flags:
C: Unaffected.
Z: Set if the result is "0"; cleared otherwise.
S: Cleared to "0".
V: Undefined.
D: Unaffected.
H: Unaffected.
Format:
opc
opc
NOTE:
Examples:
Given: R1 = 07H (00000111B) and register 01H = 03H (00000011B):
BXOR R1,01H.1
BXOR 01H.2,R1
In the first example, destination working register R1 has the value 07H (00000111B) and source
register 01H has the value 03H (00000011B). The statement "BXOR R1,01H.1" exclusive-ORs bit
one of register 01H (source) with bit zero of R1 (destination). The result bit value is stored in bit zero
of R1, changing its value from 07H to 06H. The value of source register 01H is unaffected.
src
dst | b | 0
dst
src | b | 1
In the second byte of the 3-byte instruction formats, the destination (or source) address is four
bits, the bit address 'b' is three bits, and the LSB address value is one bit in length.
→ R1 = 06H, register 01H = 03H
→ Register 01H = 07H, R1 = 07H
Bytes
Cycles
Opcode
3
6
3
6
INSTRUCTION SET
Addr Mode
(Hex)
dst
src
27
r0
Rb
27
Rb
r0
6-25

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