Bor Bit Or - Samsung S3C80A5B User Manual

INSTRUCTION SET
BOR
— Bit OR
BOR dst,src.b
BOR dst.b,src
dst(0) ← dst(0) OR src(b)
Operation:
or
dst(b) ← dst(b) OR src(0)
The specified bit of the source (or the destination) is logically ORed with bit zero (LSB) of the
destination (or the source). The resulting bit value is stored in the specified bit of the destination. No
other bits of the destination are affected. The source is unaffected.
Flags: C: Unaffected.
Z: Set if the result is "0"; cleared otherwise.
S: Cleared to "0".
V: Undefined.
D: Unaffected.
H: Unaffected.
Format:
opc
opc
NOTE:
Examples: Given: R1 = 07H and register 01H = 03H:
BOR
BOR
In the first example, destination working register R1 contains the value 07H (00000111B) and source
register 01H the value 03H (00000011B). The statement "BOR R1,01H.1" logically ORs bit one of
register 01H (source) with bit zero of R1 (destination). This leaves the same value (07H) in working
register R1.
In the second example, destination register 01H contains the value 03H (00000011B) and the
source working register R1 the value 07H (00000111B). The statement "BOR 01H.2,R1" logically
ORs bit two of register 01H (destination) with bit zero of R1 (source). This leaves the value 07H in
register 01H.
6-22
src
dst | b | 0
dst
src | b | 1
In the second byte of the 3-byte instruction formats, the destination (or source) address is four
bits, the bit address 'b' is three bits, and the LSB address value is one bit.
R1, 01H.1 → R1 = 07H, register 01H = 03H
→ Register 01H = 07H, R1 = 07H
01H.2, R1
Bytes Cycles Opcode
3 6
3 6
S3C80A5B
Addr Mode
(Hex) dst src
07 r0 Rb
07 Rb r0