Samsung S3C80A5B User Manual page 13

8-bit cmos
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Figure
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5-1
5-2
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5-7
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5-9
6-1
7-3
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8-1
8-2
8-3
9-1
9-2
9-3
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9-5
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List of Figures
S3C8-Series Interrupt Types ............................................................................................................5-2
S3C80A5B Interrupt Structure.........................................................................................................5-4
ROM Vector Address Area...............................................................................................................5-5
Interrupt Function Diagram ...............................................................................................................5-8
System Mode Register (SYM) ........................................................................................................5-10
Interrupt Mask Register (IMR)..........................................................................................................5-11
Interrupt Request Priority Groups ...................................................................................................5-12
Interrupt Priority Register (IPR) .......................................................................................................5-13
Interrupt Request Register (IRQ).....................................................................................................5-14
System Flags Register (FLAGS)....................................................................................................6-6
System Clock Circuit Diagram........................................................................................................7-2
System Clock Control Register (CLKCON).................................................................................7-3
Reset Block Diagram .........................................................................................................................8-1
Power-on Reset Circuit......................................................................................................................8-2
Timing Diagram for Power-on Reset Circuit.................................................................................8-3
S3C80A5B I/O Port Data Register Format ..................................................................................9-2
Port 0 High-Byte Control Register (P0CONH) ............................................................................9-3
Port 0 Low-Byte Control Register (P0CONL)..............................................................................9-4
Port 0 External Interrupt Control Register (P0INT) ....................................................................9-5
Port 0 External Interrupt Pending Register (P0PND)................................................................9-5
Port 1 High-Byte Control Register (P1CONH) ............................................................................9-6
Port 1 Low-Byte Control Register (P1CONL)..............................................................................9-7
Port 2 Control Register (P2CON)....................................................................................................9-8
Port 2 Data Register (P2)..................................................................................................................9-9
(Continued)
Title
Number
S3C80A5B MICROCONTROLLER
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