Mitsubishi Electric melsec q00ujcpu User Manual page 515

Programmable controller
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Number
Name
Meaning
Number of
SD393
multiple CPUs
CPU mounting
SD394
information
Multiple CPU
SD395
number
Multiple CPU
system
information
No. 1 CPU
SD396
operation status
No. 2 CPU
SD397
operation status
No. 3 CPU
SD398
operation status
No. 4 CPU
SD399
operation statu
*9: Function version is B or later.
*11: The Universal model QCPU except the Q00UJCPU, Q00UCPU, Q01UCPU, and Q02UCPU.
*17: The Universal model QCPU except the Q00UJCPU.
(3) System clocks/counters
Number
Name
Meaning
1 second
Number of counts
SD412
counter
in 1-second units
2n second clock
2n second clock
SD414
setting
units
2nms clock
SD415
2nms clock units
setting
Number of counts
SD420
Scan counter
in each scan
Low speed scan
Number of counts
SD430
counter
in each scan
12 - 49
Table12.20 Special register
Explanation
• The number of CPU modules that comprise the multiple CPU system is
stored. (1 to 3, Empty also included)
• The CPU module types of No. 1 CPU to 3 and whether the CPU
modules are mounted or not are stored.
b15
b12 b11
b8 b7
to
to
Empty (0)
CPU No.3
SD394
CPU module mounted or
not mounted
0: Not mounted
1: Mounted
• In a multiple CPU system configuration, the CPU number of the host
CPU is stored.
CPU No. 1: 1, CPU No. 2: 2, CPU No. 3: 3, CPU No. 4: 4
The operation information of each CPU No. is stored.
(The information on the number of multiple CPUs indicated in SD393 is
stored.)
b15
b14
to
b8 b7
Vacancy
Classification Operation status
mounted
0: Not mounted
1: Mounted
0: Normal
1: Minor fault
2: Medium fault
3: Major fault
F
: Reset
H
Table12.21 Special register
Explanation
• Following programmable controller CPU module RUN, 1 is added each
second
• Count repeats from 0 to 32767 to -32768 to 0
• Stores value n of 2n second clock (Default is 30)
• Setting can be made between 1 and 32767
• Stores value n of 2nms clock (Default is 30)
• Setting can be made between 1 and 32767
• Incremented by 1 for each scan execution after the CPU module is set to
RUN.
(Not counted by the scan in an initial execution type program.)
• Count repeats from 0 to 32767 to -32768 to 0
• Incremented by 1 for each scan execution after the CPU module is set to
RUN.
• Count repeats from 0 to 32767 to -32768 to 0
• Incremented by 1 for each scan execution after the CPU module is set to
RUN.
• Count repeats from 0 to 32767 to -32768 to 0
• Used only for low speed execution type programs
(When Set)
b4 b3
b0
to
to
CPU No.2
CPU No.1
CPU module type
0: PLC CPU
1: Motion CPU
2: PC CPU
to
b4 b3
to
b0
processing
0: RUN
2: STOP
3: PAUSE
4: Initial
F
: Reset
H
(When Set)
S (Every END
processing)
S (Every END
processing)
S (Every END
processing)
Corres-
ponding
Set by
Corresponding
ACPU
CPU
D9
Q00/Q01
QnU
S (Initial)
New
Q00/Q01
Q00/Q01
Qn(H)
S (Initial)
New
QnPH
QnU
Q00/Q01
QnU
S (END
New
error)
QnU
Corres-
ponding
Set by
Corresponding
ACPU
CPU
D9
S (Status
D9022
change)
QCPU
U
New
U
New
Qn(H)
QnPH
QnPRH
New
QnU
New
Q00J/Q00/Q01
Qn(H)
New
QnPH
*9
*9
*9
*9
*9
*17
*11

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