Mitsubishi Electric melsec q00ujcpu User Manual page 536

Programmable controller
Hide thumbs Also See for melsec q00ujcpu:
Table of Contents

Advertisement

Special
ACPU
Special
Register
Special
Register for
after
Register
Modification
Conversion
D9125
SD1125
SD64
D9126
SD1126
SD65
D9127
SD1127
SD66
D9128
SD1128
SD67
D9129
SD1129
SD68
D9130
SD1130
SD69
D9131
SD1131
SD70
D9132
SD1132
SD71
*1: The relevant modules are as follows:
• The Universal model QCPU whose serial number (first five digits) is "10102" or later.
• Q00UJCPU, Q00UCPU, Q01UCPU
Table12.28 Special register
Name
Meaning
Annunciator
Annunciator
detection
detection number
number
CHAPTER12 PECIAL RELAY LIST AND SPECIAL REGISTER LIST
Details
• When any of F0 to 2047 is turned on by SET F instruction, the
annunciator numbers (F numbers) that are turned on in order are
registered into SD1125 to SD1132.
• The F number turned off by RST F instruction is erased from any of
SD1125 to SD1132, and the F numbers stored after the erased F
number are shifted to the preceding registerers.
By executing LEDR instruction, the contents of SD1125 to SD1132
are shifted upward by one.
When there are 8 annunciator detections, the 9th one is not stored
into SD1125 to SD1132 even if detected.
SET
SET
SET
RST
SET
SET
SET
SET
F50
F25
F99
F25
F15
F70
F65
F38
0
50 50 50 50 50 50 50 50 50 50 50 99
SD1009
0
1
2
3
2
3
4
5
SD1124
0
50
50 50 50 50 50 50 50 50 50 50 99
SD1125
0
0
25 25 99 99 99 99 99 99 99 99 15
SD1126
0
0
0
99
0
15 15 15 15 15 15 15 70
SD1127
0
0
0
0
0
0
70 70 70 70 70 70 65
SD1128
0
0
0
0
0
0
0
65 65 65 65 65 38
SD1129
0
0
0
0
0
0
0
0
SD1130
0
0
0
0
0
0
0
0
SD1131
0
0
0
0
0
0
0
0
SD1132
Corresponding
CPU
SET
SET
SET
F210 LEDR
F110
F151
Qn(H)
QnPH
6
7
8
8
8
*1
QnU
38 38 38 38 110
0
110 110 110 151
0
0
151 151 210
12 - 70
1
2
3
12
6
7
8

Advertisement

Table of Contents
loading

Table of Contents