Mitsubishi Electric melsec q00ujcpu User Manual page 469

Programmable controller
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Number
Name
SM56
Operation error
SM60
Blown fuse detection
SM61
I/O module verify error
SM62
Annunciator detection
SM80
CHK detection
SM90
SM91
SM92
SM93
Startup of monitoring
SM94
timer for step transition
(Enabled only when
SM95
SFC program exists)
SM96
SM97
SM98
SM99
Serial communication
SM100
function using flag
Communication
SM101
protocol status flag
SM110
Protocol error
SM111
Communication status
SM112
Error information clear
SM113
Overrun error
SM114
Parity error
SM115
Framing error
Program memory
SM165
batch transfer
execution status
*6: The relevant modules are as follows:
• The Universal model QCPU whose serial number (first five digits) is "10012" or later.
• Q13UDHCPU, Q26UDHCPU
*7: The module whose first 5 digits of serial No. is "10102" or later.
12 - 3
Table12.2 Special relay
Meaning
• ON when operation error is generated
OFF : Normal
• Remains ON if the condition is restored to normal
ON : Operation error
thereafter.
• Turns ON if there is at least one output module
whose fuse has blown.
OFF : Normal
• Remains ON if the condition is restored to normal
ON : Module with blown
thereafter.
fuse
• Blown fuse status is checked even for remote I/O
station output modules.
• Turns ON if the I/O module differs from the status
registered at power on.
OFF : Normal
• Remains ON if the condition is restored to normal
ON : Error
thereafter.
• I/O module verification is also conducted for remote
I/O station modules.
OFF : Not detected
• Goes ON if even one annunciator (F) goes ON.
ON : Detected
• Goes ON if error is detected by CHK instruction.
OFF : Not detected
• Remains ON if the condition is restored to normal
ON : Detected
thereafter.
Corresponds
to SD90
Corresponds
to SD91
Corresponds
to SD92
Corresponds
to SD93
Corresponds
OFF : Not started(monitoring
to SD94
timer reset)
ON : Started(monitoring
Corresponds
timer started)
to SD95
Corresponds
to SD96
Corresponds
to SD97
Corresponds
to SD98
Corresponds
to SD99
OFF : Serial communication
• Stores the setting of whether the serial
function is not used.
communication function is used or not in the serial
ON : Serial communication
communication setting parameter
function is used.
OFF : GX Developer
• Stores whether the device that is communicating via
ON : MC protocol
the RS-232 interface is GX Developer or MC protocol
communication device
communication device
• Turns ON when an abnormal protocol was used to
make communication in the serial communication
OFF : Normal
function.
ON : Abnormal
• Remains ON if the condition is restored to normal
thereafter
• Turns ON when the mode used to make
communication was different from the setting in the
OFF : Normal
serial communication function.
ON : Abnormal
• Remains ON if the condition is restored to normal
thereafter.
• Turns ON when the error codes stored in SM110,
ON : Cleared
SM111, SD110 and SD111 are cleared. (Activated
when turned from OFF to ON)
OFF : Normal
• Turns ON when an overrun error occurred in the
ON : Abnormal
serial communication error.
OFF : Normal
• Turns ON when a parity error occurred in the serial
ON : Abnormal
communication error.
OFF : Normal
• Turns ON when a framing error occurred in the serial
ON : Abnormal
communication error.
• Turns ON when the data is written to the program
cache memory.
OFF : Completed
• Turns OFF when the program memory batch transfer
ON : Not being executed or
is completed.
Not completed
• Remains ON if the program memory batch transfer is
not executed after the data is written to the program
cache memory.
Explanation
• Goes ON when measurement of
step transition monitoring timer is
commenced.
• Resets step transition monitoring
timer when it goes OFF.
Corres-
Set by
ponding
Corresponding
ACPU
(When Set)
M9
S (Error)
M9011
S (Error)
M9000
S (Error)
M9002
S (Instruction
M9009
execution)
S (Instruction
New
execution)
M9108
M9109
M9110
M9111
M9112
U
M9113
M9114
New
New
New
S (Power-ON or
reset)
S (RS232
communication)
S (Error)
New
S (Error)
U
S (Error)
S (Error)
S (Error)
S (When status
New
changed)
CPU
QCPU
Qn(H)
QnPH
QnPRH
Qn(H)
QnPH
QnPRH
Q00/Q01
Q00UJ
Q00U
Q01U
*7
Q02U
6
QnU*

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