Mitsubishi Electric melsec q00ujcpu User Manual page 476

Programmable controller
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(6) Memory cards
Number
Name
Memory card usable
OFF : Unusable
SM600
flags
ON : Use enabled
Memory card protect
OFF : No protect
SM601
flag
ON : Protect
OFF : No drive 1
SM602
Drive 1 flag
ON : Drive 1 present
OFF : No drive 2
SM603
Drive 2 flag
ON : Drive 2 present
Memory card in-use
OFF : Not used
SM604
flag
ON : In use
OFF : Remove/insert enabled
Memory card remove/
SM605
ON : Remove/insert
insert prohibit flag
OFF : Remove/insert
Memory card remove/
SM609
insert enable flag
ON : Remove/insert enabled
OFF : Unusable
SM620
Drive 3/4 usable flags
ON : Use enabled
OFF : No drive 3
SM622
Drive 3 flag
ON : Drive 3 present
OFF : No drive 4
SM623
Drive 4 flag
ON : Drive 4 present
OFF : Not used
SM624
Drive 3/4 in-use flag
ON : In use
OFF : File register not used
SM640
File register use
ON : File register in use
*1: The Universal model QCPU except the Q00UJCPU, Q00UCPU, and Q01UCPU.
*2: The Universal model QCPU except the Q00UJCPU.
Table12.7 Special relay
Meaning
• ON when memory card is ready for use by user
• Goes ON when memory card protect switch is ON
• Turns ON when the mounted memory card is RAM
• Turns ON when the mounted memory card is ROM
• Goes ON when memory card is in use
• Goes ON when memory card cannot be inserted or
removed
prohibited
• Turned ON by user to enable the removal/insertion
of memory card.
• Turned OFF by the system after the memory card is
prohibited
removed.
• This contact can be used only when SM604 and
SM605 are OFF.
• Always ON
• Always ON
• Always ON
• Goes ON when the file within Drive 3 (standard
RAM) or Drive 4 (standard ROM) is used.
• Goes ON when file register is in use
CHAPTER12 SPECIAL RELAY LIST AND SPECIAL REGISTER LIST
Explanation
(When Set)
S (Status change)
S (Status change)
S (Status change)
S (Status change)
S (Status change)
S (Initial)
S (Initial)
S (Initial)
S (Status change)
S (Status change)
Corres-
ponding
Set by
Corresponding
ACPU
CPU
M9
New
New
New
New
Qn(H)
QnPH
New
QnPRH
*1
QnU
U
New
S/U
New
New
QCPU
Q00J/Q00/Q01
Qn(H)
QnPH
New
QnPRH
*2
QnU
New
QCPU
Qn(H)
QnPH
New
QnPRH
QnU
Q00J/Q00/Q01
Qn(H)
QnPH
New
QnPRH
*2
QnU
12 - 10
1
2
3
12
6
7
8

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