Register Definition; Spi Control Register 1 (Spix_C1) - Freescale Semiconductor MC9S08PT60 Reference Manual

Register Definition

16.3 Register Definition
The SPI has 8-bit registers to select SPI options, to control baud rate, to report SPI status,
to hold an SPI data match value, and for transmit/receive data.
Absolute
address
(hex)
3098 SPI control register 1 (SPI0_C1)
3099 SPI control register 2 (SPI0_C2)
309A SPI baud rate register (SPI0_BR)
309B SPI status register (SPI0_S)
309D SPI data register (SPI0_D)
309F SPI match register (SPI0_M)

16.3.1 SPI control register 1 (SPIx_C1)

This read/write register includes the SPI enable control, interrupt enables, and
configuration options.
Address: 3098h base + 0h offset = 3098h
Bit 7
Read
SPIE
Write
Reset 0
Field
7 SPI interrupt enable: for SPRF and MODF
SPIE
This bit enables the interrupt for SPI receive buffer full (SPRF) and mode fault (MODF) events.
0 Interrupts from SPRF and MODF are inhibited—use polling
1
Request a hardware interrupt when SPRF or MODF is 1
6 SPI system enable
SPE
This bit enables the SPI system and dedicates the SPI port pins to SPI system functions. If SPE is
cleared, the SPI is disabled and forced into an idle state, and all status bits in the S register are reset.
446
SPI memory map
Register name
6 5
SPE SPTIE MSTR
0 0
SPI0_C1 field descriptions
Table continues on the next page...
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
Width
Access
(in bits)
8 R/W
8 R/W
8 R/W
8 R
8 R/W
8 R/W
4 3 2
CPOL CPHA
0 0 1
Description
Section/
Reset value
page
04h 16.3.1/446
00h 16.3.2/448
00h 16.3.3/449
20h 16.3.4/450
00h 16.3.5/451
00h 16.3.6/452
1 0
SSOE LSBFE
0 0
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