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Field
5–3
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
2
Output Enable for Port H Bit 2
PTHOE2
This read/write bit enables the port H pin as an output.
0
Output Disabled for port H bit 2.
1
Output Enabled for port H bit 2.
1
Output Enable for Port H Bit 1
PTHOE1
This read/write bit enables the port H pin as an output.
0
Output Disabled for port H bit 1.
1
Output Enabled for port H bit 1.
0
Output Enable for Port H Bit 0
PTHOE0
This read/write bit enables the port H pin as an output.
0
Output Disabled for port H bit 0.
1
Output Enabled for port H bit 0.
7.7.18 Port A Input Enable Register (PORT_PTAIE)
Address: 0h base + 30B8h offset = 30B8h
Bit
7
Read
PTAIE7
Write
Reset
0
Field
7
Input Enable for Port A Bit 7
PTAIE7
This read/write bit enables the port A pin as an input.
0
Input disabled for port A bit 7.
1
Input enabled for port A bit 7.
6
Input Enable for Port A Bit 6
PTAIE6
This read/write bit enables the port A pin as an input.
0
Input disabled for port A bit 6.
1
Input enabled for port A bit 6.
5
Input Enable for Port A Bit 5
PTAIE5
This read/write bit enables the port A pin as an input.
Freescale Semiconductor, Inc.
PORT_PTHOE field descriptions (continued)
6
5
PTAIE6
PTAIE5
0
0
PORT_PTAIE field descriptions
Table continues on the next page...
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
Description
4
3
2
0
PTAIE3
PTAIE2
0
0
0
Description
Chapter 7 Parallel input/output
1
0
PTAIE1
PTAIE0
0
0
177
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