State 5: Gain Lock And Measure Power - Analog Devices AD9361 Reference Manual

AD9361 Reference Manual

STATE 5: GAIN LOCK AND MEASURE POWER

When the AGC reaches State 5, the AGC locks the gain (if it was
unlocked). The AGC also measures the average signal power
when the gain locks and stores this value as a reference power
level. This value is used for comparisons against other thresholds,
which can unlock the gain. State 5 is the final state in the AGC
algorithm and is intended to maintain the same gain unless a
large change in signal amplitude occurs (such the end of the burst
or subframe or a large interfering signal suddenly arrives or
departs). In State 2 and State 3, the measurement length is set by
Dec Power Measurement Duration. In State 5, the measurement
length is set by Power Meas in State 5. The mapping of bits to
duration is the same for both sets of registers and is defined in
Equation 17. The reason for the difference is that in earlier states,
the object is to lock the gain as quickly as possible. This would
mean that a shorter measurement time may be used for earlier
states but a longer time can be used once the gain has locked.
When the gain unlocks, the AGC can reset the gain to maximum
gain or to one of several other gain positions as shown in
Table 23. When the gain unlocks, the AGC returns to State 1 (or
State 0 if the AD9361 exits the Rx state). When the AGC returns
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to State 1, it sets the digital gain to 0 dB (unless the digital gain is
Table 23.Gain Unlock Index Options
Gain Index
Set By
When Reset
Maximum Gain Maximum Full Table or Maximum LMT Table Index
(0x0FD) and Maximum LPF of 0x18
Optimize Gain AGC gain lock index at end of last burst
Plus
Optimize Gain Offset (0x116[D3:D0])
Set Gain AGC gain lock index at the start of the last burst
Or
AGC gain lock index at the end of the last burst
No Gain N/A
Change
Table 24.Gain Unlock Condition vs. Gain Index
Condition that Unlocks the Gain
Exit Rx State
Exit Rx State
Exit Rx State
Energy Lost Threshold Exceeded
Energy Lost Threshold Exceeded
Stronger Signal Threshold Exceeded
Large ADC Overload
Large LMT Overload
1 A gain index type of no change indicates that the gain index does not immediately change but the AGC algorithm does start over so the gain index will very likely
change after the AGC moves through its states and re-locks. For other gain index types such as set gain, the AGC first changes the gain index to the proper position
and then restarts the algorithm.
forced to a fixed value). Optimize Gain and Set Gain both can
reduce the time required for gain lock since they both use the
previous burst gain index information.
Set Gain can use either the beginning or ending gain lock index
of the previous burst. The setting of Use Last Lock Level for Set
Gain determines which gain index is used. The front of the burst
would typically be used if a preamble or boosted portion of the
signal occurs at the beginning of the burst. The AGC should lock
on that boosted portion. If the entire burst uses the same nominal
power level, then the AGC should use the end of the burst gain
index.
If the thresholds are set correctly, then the most likely scenario is
for the AGC to unlock the gain at the end of the burst (Energy
Lost Threshold) or if the
the gain for an ADC overload is similar to a stronger signal test
but is a peak detector rather than a power detector. Unlocking the
gain for a large LMT overload checks for large interfering signals
and is a peak detector. All of these tests are recommended for a
typical fast AGC configuration. Even in this simple case, there are
options for what happens to the Gain Index when the gain
unlocks (see Table 24).
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Definition
Maximum Analog Gain
An optimized value that reduces the amount of steps the AGC
should typically take to lock the gain for each burst
Similar to Optimize Gain but allows use of front of burst gain or
end of burst gain setting
No change to the gain index
Gain Index Type 1 Set Bits
Max gain None required
Optimize gain 0x110[D2]
Set gain 0x110[D4]
Max gain None required
Optimize gain 0x110[D6]
No change None required
No change None required
No change None required
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AD9361 exits the Rx State. Unlocking
Clear Bits
0x110[D4], 0x110[D2]
0x110[D4]
0x110[D2]
0x110[D6]. 0x110[D3] only if 0x0FB[D6] set
0x110[D3] only if 0x0FB[D6] set
0x115[D7] if 0x0FB[D6] set
0x114[D7] and 0x110[D1] if 0x0FB[D6] set
0x110[D1] if 0x0FB[D6] set
UG-570
(17)