REFCLK
J1
J2
DESCRIPTION
This data sheet describes the AD9956/PCB evaluation board
hardware and software. The current version of software
provides a graphical user interface (GUI) that allows easy
communication with the many on-chip functions of the device.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
2.7 GHz DDS-Based AgileRF
EVALUATION BOARD FUNCTIONAL BLOCK DIAGRAM
AD9956
RF
DIVIDER
DDS
÷R
SYSCLK
REFCLK
SYSCLK
PLL_OSC
CML DRIVER
PHASE FREQUENCY DETECTOR/
CHARGE PUMP
÷M
PLL_REF
÷N
J3
PLL_OSC
DAC IOUT
DAC IOUT
DRV_OUT
J5
DRV_OUT
50Ω
CP_OUT
VCO AND LOOP FILTER ONLY POPULATED ON
AD9956-VCO/PCB. THESE SOCKETS LEFT VACANT
FOR USER TO POPULATE ON AD9956/PCB
Figure 1.
The AD9956 is a highly sophisticated AgileRF synthesizer with
numerous user-programmable functions. See the AD9956 data
sheet for detailed information about the part.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
Evaluation Board for
™
Synthesizer
AD9956/PCB
J7
J6
LPF
J4
J16
VCO
LPF
© 2005 Analog Devices, Inc. All rights reserved.
www.analog.com
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