Overloads In Slow Attack Agc Mode; Slow Attack Agc And Gain Tables - Analog Devices AD9361 Reference Manual

AD9361 Reference Manual

OVERLOADS IN SLOW ATTACK AGC MODE

In addition to the control loop discussed previously, the slow
attack AGC can react more quickly to peak overload events such
as the large LMT and large ADC overloads.
In slow attack mode, the AD9361
particular overload event occurs. Only if the event(s) occur more
than a programmable number of times will the gain change. Even
for these peak overloads, the gain only changes when the Gain
Update Counter expires. The counters are stored as the LMT and
ADC Overload Counters. The
values for these counters so the BBP must write all of these values
using the ad9361_set_rx_gain_control_mode function.
During the a gain change event, the highest priority is given to
the large LMT detector, followed by the large ADC detector, and
followed lastly by the power detectors used by the second-order
window control loop.
It is also possible to setup the
overloads and/or large ADC overloads result in an immediate
gain change, ignoring the Gain Update Counter. This mode is set
with the Immed Gain Change if Lg LMT Overload bit and Immed
Gain Change if Lg ADC Overload bit.
If the average signal power falls below one or both of the control
loop low thresholds (which would normally result in a gain
increase) but one or both of the small peak overload detectors
Table 18. Slow Attack AGC Full Gain Table Overload Steps
Peak Overload Reduce Gain by this many Indices (Step Size)
Large LMT Dec Step Size for Large LMT Overload
Large ADC Decrement Step Size for Large LPF Gain Change
Digital Saturation Digital Gain Step Size + 1
Table 19. Slow Attack/Hybrid AGC Split Gain Table Overload Steps
Overload Type
Large LMT
Large LMT
Large or Small ADC
Large or Small ADC
Digital Saturation
counts the number of times a
AD9361 does not have default
AD9361 such that large LMT
Gain Index Position(s)
LMT Index > 0
LMT Index = 0
LMT Index is in Upper LMT Table (Index > Initial LMT Gain Limit)
LMT Index is in Lower LMT Table (Index ≤ Initial LMT Gain Limit)
N/A
(LMT or ADC) has tripped, setting the Prevent Gain Inc bit
prevents the gain from increasing.
Like LMT and ADC overloads, the
determine how many times digital saturation has occurred. This
counter is the Dig Saturation Exceeded Counter, and if it is
exceeded, the gain index is reduced.

SLOW ATTACK AGC AND GAIN TABLES

In full table mode, a single table controls the gain of all Rx signal
path stages. Table 18 shows the effect of peak overloads (after
their associated counters are exceeded). Recall that a particular
overload condition results in the gain index moving a program-
mable number of steps but the gain may change in any number of
different gain blocks.
In split table mode, the gain table is split as described earlier in
the document and as shown in Figure 23.
In a split table, there are two independent index pointers for
analog gain and one additional pointer for digital gain (if
enabled). Table 19 describes the effect of various peak overload
conditions, identical to split table shown in the manual gain
section. If the gain changes in the LPF table, the LPF step size
used is Decrement Step Size for: Large LPF Gain Change.
Similarly, if the gain is changed in the LMT table, the step size
used is Dec Step Size for: Large LMT Overload.
Step Size Location
Step Size for: Large LMT Overload/Full Table Case #3
Decrement Step Size for: Large LPF Gain Change/Full Table Case #1
Digital Gain Step Size
Rev. A | Page 41 of 128
UG-570
AD9361 uses a counter to
Change Gain in
LMT table
LPF table
LMT table
LPF table
Digital table