Mitsubishi Electric MOTION CONTROLLERS Q172DCPU Programming Manual page 54

2 MULTIPLE CPU SYSTEM
No. Name
Multiple CPU high speed
1)
transmission area
2)
3)
CPU No. n send area
4)
(n=1 to 4)
5)
6) User setting area
Automatic refresh
7)
area
(3) Memory configuration of Multiple CPU high speed transmission
area
Memory configuration of Multiple CPU high speed transmission area is shown
below.
1)
Multiple CPU high speed
transmission area
[Variable in 0 to
14k[points] ]
(Note-1)
Table 2.5 Description of area
• Area for data transmission between each CPU module
in the Multiple CPU system.
• The area up to 14k [points] is divided between each
CPU module that constitutes the Multiple CPU system.
• Area to store the send data of the each CPU module.
• Sends the data stored in the send area of self CPU to
the other CPUs.
• Other CPU send area stores the data received from
the other CPUs.
• Area for data communication with other CPUs using
the Multiple CPU area device.
• Can be accessed by the user program using the
Multiple CPU area device.
• Refer to Section 2.3.2 (1) for details of this area.
• Area for communicating device data with other CPUs
by the communication using the automatic refresh.
• Access by user program is disabled.
• Refer to Section "(4)(b) Automatic refresh setting" for
details of this area.
2)
CPU No.1 send area
3)
CPU No.2 send area
4)
CPU No.3 send area
5)
CPU No.4 send area
(Note-1): Multiple CPU high speed transmission area;
14k[points]: Maximum value when constituted with two CPUs
13k[points]: Maximum value when constituted with three CPUs
12k[points]: Maximum value when constituted with four CPUs
Description
2 - 17
6)
User setting area
7)
Automatic refresh area
Size
Setting range Setting unit
0 to 14k 1k
0 to 14k 1k
0 to 14k 2
0 to 14k 2