Motorola MVME2600 Series Reference Manual page 9

MPIC Registers ................................................................................................ 2-61
RavenMPIC Registers ............................................................................... 2-61
Feature Reporting Register ....................................................................... 2-65
Global Configuration Register .................................................................. 2-66
Vendor Identification Register .................................................................. 2-67
Processor Init Register .............................................................................. 2-67
IPI Vector/Priority Registers..................................................................... 2-68
Spurious Vector Register .......................................................................... 2-69
Timer Frequency Register......................................................................... 2-69
Timer Current Count Registers ................................................................. 2-70
Timer Basecount Registers ....................................................................... 2-70
Timer Vector/Priority Registers ................................................................ 2-71
Timer Destination Registers...................................................................... 2-72
External Source Vector/Priority Registers ................................................ 2-72
External Source Destination Registers...................................................... 2-74
Raven-Detected Errors Vector/Priority Register ...................................... 2-74
Raven-Detected Errors Destination Register ............................................ 2-75
Interprocessor Interrupt Dispatch Registers.............................................. 2-76
Interrupt Task Priority Registers ............................................................... 2-76
Interrupt Acknowledge Registers.............................................................. 2-78
End-of-Interrupt Registers ........................................................................ 2-78
Programming Notes.......................................................................................... 2-79
External Interrupt Service ......................................................................... 2-79
Reset State ................................................................................................. 2-80
Operation .......................................................................................................... 2-81
Interprocessor Interrupts ........................................................................... 2-81
Dynamically Changing I/O Interrupt Configuration................................. 2-81
EOI Register.............................................................................................. 2-81
Interrupt Acknowledge Register ............................................................... 2-82
8259 Mode ................................................................................................ 2-82
Current Task Priority Level ...................................................................... 2-82
Architectural Notes........................................................................................... 2-82
CHAPTER 3 Falcon ECC Memory Controller Chip Set
Introduction ............................................................................................................... 3-1
Overview ............................................................................................................ 3-1
Bit Ordering Convention .................................................................................... 3-1
Features .............................................................................................................. 3-1
Block Diagrams ......................................................................................................... 3-2
Functional Description .............................................................................................. 3-6
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