Ipi Vector/Priority Registers - Motorola MVME2600 Series Reference Manual

Raven PCI Host Bridge & Multi-Processor Interrupt Controller Chip
2

IPI Vector/Priority Registers

Offset
Bit 3
1
Name
Operation
Reset
2-68
The Soft Reset input to the 604 is negative edge-sensitive.
3 2 2 2 2 2 2 2 2 2
0 9 8 7 6 5 4 3 2 1
R
$000
MASK MASK. Setting this bit disables any further interrupts
from this source. If the mask bit is cleared while the bit
associated with this interrupt is set in the IPR, the interrupt
request will be generated.
ACT ACTIVITY. The activity bit indicates that an interrupt
has been requested or that it is in-service. The ACT bit is
set to a one when its associated bit in the Interrupt Pending
Register or In-Service Register is set.
PRIOR Interrupt priority 0 is the lowest and 15 is the highest.
Note that a priority level of 0 will not enable interrupts.
VECTOR This vector is returned when the Interrupt Acknowledge
register is examined during a request for the interrupt
associated with this vector.
IPI 0 - $010A0
IPI 1 - $010B0
IPI 2 - $010C0
IPI 3 - $010D0
2 1 1 1 1 1 1 1 1 1
0 9 8 7 6 5 4 3 2 1
IPI VECTOR/PRIORITY
PRIOR
R/W R
$0 $00
1
0 9 8 7 6 5 4 3 2 1 0
VECTOR
R/W
$00