Revision Id/ General Control Register - Motorola MVME2600 Series Reference Manual

Falcon ECC Memory Controller Chip Set

Revision ID/ General Control Register

ADDRESS
3
BIT
NAME
OPERATIO
N
RESET
3-34
REVID
READ ZERO READ ONLY
X
REVID The REVID bits are hard-wired to indicate the revision
level of the Falcon. The value for the first revision is $01,
for the second is $02.
aonly_en Normally, the Falcon pair responds to address-only cycles
only if they fall within the address range of one of its
enabled map decoders. When the aonly_en bit is set, the
Falcon pair also responds to address-only cycles that fall
outside of the range of its enabled map decoders provided
they are not acknowledged by some other slave within 8
clock periods. aonly_en is read-only and reflects the level
that was on the CKD4 pin at power-up reset.
isa_hole When it is set, isa_hole disables any of the DRAM or
ROM/Flash blocks from responding to PowerPC accesses
in the range from $000A0000 to $000BFFFF. This has the
effect of creating a hole in the DRAM memory map for
accesses to ISA. When isa_hole is cleared, there is no hole
created in the memory map.
adis When adis is clear, fast page mode operation is used for
back-to-back pipelined accesses to the same page within
DRAM. When it is set, RAS is cycled between accesses.
This bit should normally be cleared unless the Falcon has
a problem operating that way.
$FEF80008
X