Board Description and Memory Maps
1
PCI I/O Address
0000 1000
0000 1001
0000 1002
0000 1003
0000 1004
0000 1005
0000 1006
LM/SIG Control Register
REG
BIT
SD7
FIELD
SET
SIG1
OPER
RESET
0
1-40
Table 1-19. VME Registers
SIG/LM Control Register
SIG/LM Status Register
VMEbus Location Monitor Upper Base Address
VMEbus Location Monitor Lower Base Address
VMEbus Semaphore Register 1
VMEbus Semaphore Register 2
VMEbus Geographical Address Status
These registers are described in the following sub-sections.
The LM/SIG Control Register is an 8-bit register located at ISA I/O
address x1000. This register provides a method to generate software
interrupts. The Universe ASIC is programmed so that this register can be
accessed from the VMEbus to generate software interrupts to the
processor(s).
LM/SIG Control Register - Offset $1000
SD6
SD5
SET
SET
SIG0
LM1
0
0
SET_SIG1 Writing a 1 to this bit will set the SIG1 status bit.
SET_SIG0 Writing a 1 to this bit will set the SIG0 status bit.
Function
SD4
SD3
SD2
SET
CLR
CLR
LM0
SIG1
SIG0
WRITE-ONLY
0
0
SD1
SD0
CLR
CLR
LM1
LM0
0
0
0