Rom B Base/Size Register - Motorola MVME2600 Series Reference Manual

Falcon ECC Memory Controller Chip Set
Transfer
Cycle
Size
write 1-byte
3
write 1-byte
write 4-byte
write 4-byte
write 4-byte
write 4-byte
write 2,3,5,6,7,
8,32-byte
read

ROM B Base/Size Register

ADDRESS
BIT
NAME
OPERATIO
N
RESET
3-48
Alignment
X
X
Misaligned
Aligned
Aligned
Aligned
X
X X
ROM B BASE
READ/WRITE
$FF4 PL
ROM B BASE
ROM/Flash Block B. ROM B BASE bits 0-11
correspond to PowerPC 60x address bits 0 - 11
respectively. For larger ROM/Flash sizes, the lower
significant bits of ROM B BASE are ignored. This means
that the block's base address will always appear at an even
multiple of its size. ROM B BASE is initialized to $FF4
at power-up or local bus reset.
rom_x_64 rom_x_we
0 1
1 X
X X
0 X
1 0
1 1
X X
X X
$FEF80058
READ ZERO
X
These control bits define the base address for
Falcon Response
Normal termination, write
occurs to ROM/Flash
No Response
No Response
No Response
Normal termination, but no
write to ROM/Flash
Normal termination, write
occurs to ROM/Flash
No Response
Normal Termination