Timer Vector/Priority Registers - Motorola MVME2600 Series Reference Manual

BC

Timer Vector/Priority Registers

Offset
Bit 3 3 2 2 2
1 0 9 8 7
Name
Operation
Reset
MASK
ACT
PRIOR
VECTOR This vector is returned when the Interrupt Acknowledge
BASE COUNT. This field contains the 31 bit count for
this timer. When a value is written into this register and
the CI bit transitions from a 1 to a 0, it is copied into the
corresponding Current Count register and the toggle bit in
the Current Count register is cleared. When the timer
counts down to zero, the Current Count register is
reloaded from the Base Count register.
Timer 0 - $01120
Timer 1 - $01160
Timer 2 - $011A0
Timer 3 - $011E0
2 2 2 2 2 2 2 1 1 1
6 5 4 3 2 1 0 9 8 7
TIMER VECTOR/PRIORITY
PRIOR
R R/W
$000 $0
MASK. Setting this bit disables any further interrupts
from this source. If the mask bit is cleared while the bit
associated with this interrupt is set in the IPR, the interrupt
request will be generated.
ACTIVITY. The activity bit indicates that an interrupt
has been requested or that it is in-service. The ACT bit is
set to a one when its associated bit in the Interrupt Pending
Register or In-Service Register is set.
Interrupt priority 0 is the lowest and 15 is the highest.
Note that a priority level of 0 will not enable interrupts.
register is examined upon acknowledgement of the
interrupt associated with this vector.
Raven Interrupt Controller Implementation
1 1 1 1 1 1 1
6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
R
$00
2
VECTOR
R/W
$00
2-71