Example 3: Universe Chip Is Checked At Tundra - Motorola MVME2600 Series Reference Manual

Universe (VMEbus to PCI) Chip

Example 3: Universe Chip is Checked at Tundra

4
4-20
An engineer at Tundra Semiconductor Corporation had run a simulation on
the LSI0_CTL register, and could see that it was going to be enabled after
a port 92 reset. Motorola engineers mentioned that the problem is primarily
with the _BS, _BD, and _TO registers. He said he would run more
simulations to look at the outcome on those registers. Motorola engineers
explained what they had seen.
The engineer at Tundra re-ran the simulation based on the information
given him. He saw exactly what the Motorola engineers had seen, . i.e., that
the LSI0_BS, LSI0_BD, and LSI0_TO values change, as well as the
LSI0_CTL fields for program, super, and vct. He checked to see if this is
in fact what the Universe is supposed to do.
The following are his results:
Register Before RST#
-------- -----------
LSI0_CTL 8082_5FFF
LSI0_BS FFFF_FFFF
LSI0_BD FFFF_FFFF
LSIO_TO FFFF_FFFF
Explanation:
All the fields in the LSI0 registers which are "Power-up Options" cannot
be reset by assertion of RST# (PCI reset).
The following fields in the LSIO registers cannot be reset by a PCI reset:
LSI0_CTL register: EN, VAS, LAS
LSI0_BS register: Bits [31:28]
LSI0_BD register: Bits [31:28]
All the other fields in the LSI0 registers are reset to 0, which explains why
the PGM and SUPER fields changed, the translation offset reset to 0, etc.
After RST#
-----------
8082_0001
F000_0000
F000_0000
0000_0000