Motorola MVME2600 Series Reference Manual page 272

PowerPC 601™
PowerPC 603™
PowerPC 604™
PowerPC Reference Platform (PRP)
PowerStack™ RISC PC (System Board)
PRP
PRP-compliant
PRP Spec
PROM
PS/2
QFP
superscalar, which means it can handle more than one instruction
per clock cycle. Instructions can be sent simultaneously to three
types of independent execution units (branch units, fixed-point
units, and floating-point units), where they can execute
concurrently, but finish out of order. PowerPC is used by
Motorola, Inc. under license from IBM.
The first implementation of the PowerPC family of
microprocessors. This CPU incorporates a memory management
unit with a 256-entry buffer and a 32KB unified (instruction and
data) cache. It provides a 64-bit data bus and a separate 32-bit
address bus. PowerPC 601 is used by Motorola, Inc. under license
from IBM.
The second implementation of the PowerPC family of
microprocessors. This CPU incorporates a memory management
unit with a 64-entry buffer and an 8KB (instruction and data)
cache. It provides a selectable 32-bit or 64-bit data bus and a
separate 32-bit address bus. PowerPC 603 is used by Motorola,
Inc. under license from IBM.
The third implementation of the PowerPC family of
microprocessors. PowerPC 604 is used by Motorola, Inc. under
license from IBM.
A specification published by the IBM Power Personal Systems
Division which defines the devices, interfaces, and data formats
that make up a PRP-compliant system using a PowerPC processor.
A PowerPC-based computer board platform developed by the
Motorola Computer Group. It supports Microsoft's Windows NT
and IBM's AIX operating systems.
See PowerPC Reference Platform (PRP).
See PowerPC Reference Platform (PRP).
See PowerPC Reference Platform (PRP).
Programmable Read-Only Memory
Personal System/2 (IBM)
Quad Flat Package
Glossary
G
L
O
S
S
A
R
Y
GL-9