Motorola MVME2600 Series Reference Manual page 283

swen 3-44
Syndrome Codes
System Configuration Register (SYSCR)
1-28
System External Cache Control Register
(SXCCR)
system register summary
T
Test SRAM 3-52
tester control registers
Tester Description
tien 3-40
Timer Basecount Registers
Timer Current Count Registers
Timer Destination Registers
Timer Frequency Register
Timer Vector/Priority Registers
timers 2-55
Timing (DRAM Access) 3-8, 3-9,
Timing (ROM/Flash Access)
true, definition
trun 3-51
tsse 3-51
U
UCSR access mechanisms
Universe (VMEbus to PCI) chip
Universe as PCI master
Universe as PCI slave
Universe as VMEbus master
Universe as VMEbus slave
Universe PCI Register values for CHRP
memory map
Universe PCI register values for PREP mem-
I
ory map
Universe PCI register values for VMEbus
N
slave map example
D
Universe register map
E
Universe's involvement
X
Upper/Lower Chip Status Bit
IN-6
3-59
1-31
1-27
3-51
3-15
2-70
2-70
2-72
2-69
2-71
3-10
3-11
1-3
4-8
4-1
4-5
4-5
4-4
4-4
1-16
1-20
1-25
4-8
5-15
3-35
V
Vendor ID/ Device ID Registers
Vendor ID/Device ID Registers
Vendor Identification Register
Vendor/Device Register 3-33
VME Geographical Address
(VGAR) 1-44
VME registers 1-39, 1-40
VMEbus domain 5-15
VMEbus interface 4-4
VMEbus interrupt handling
VMEbus mapping 1-21
VMEbus master map 1-21
VMEbus master mapping
VMEbus slave map 1-23
VMEbus slave map example
VMEbus slave mapping 1-24
W
W83C553 PIB registers 1-34
when MPC devices are big-endian
when MPC devices are little endian
word, definition 1-3
Writing to the Control Registers
Z
Z85230 ESCC and Z8536 CIO registers and
port pins 1-44
Z8536 CIO port pins 1-46
Z8536 CIO port pins assignment
Z8536/Z85230 access registers
Z8536/Z85230 registers 1-45
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Index
2-43
2-24
2-67
Register
4-6
1-22
1-26
2-16
2-17
3-55
1-46
1-45