Dsp Subsystem Virtual Address Space Divided Into Sections - Texas Instruments OMAP5910 Reference Manual

Multimedia processor dsp subsystem
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DSP Memory Management Unit
Figure 36.

DSP Subsystem Virtual Address Space Divided Into Sections

84
DSP Subsystem
If MPNMC in ST3_55 is 0, the virtual memory address range 0xFF 8000
through 0xFF FFFF will be mapped to the DSP subsystem internal PDROM.
Conversely, if MPNMC = 1, the internal PDROM will be disabled and the
addresses will be mapped to external memory. The DSP MMU only controls
the mapping of these addresses when MPNMC = 1.
Byte address
0x00 0000
0x10 0000
0x20 0000
0x30 0000
0xD0 0000
0xE0 0000
0xF0 0000
0xFF FFFF
The following restrictions apply when using a first-level translation table:
A total of 64-bytes (four bytes per descriptor) of memory must be allocated
-
for the table.
The start address of the translation table must be aligned to a 128-byte
-
boundary; that is, the least significant seven address bits of the 32-bit start
address must be zeros.
DSP subsystem
virtual memory
Section 0
Section 1
Section 2
...
Section 13
Section 14
Section 15
Corresponding
translation table
entry
Entry 0
Entry 1
Entry 2
Entry 13
Entry 14
Entry 15
SPRU890A

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