Texas Instruments OMAP5910 Reference Manual page 78

DSP Memory Management Unit
6.2.2.5 Reading TLB Entries
6.2.2.6 Deleting TLB Entries
78 DSP Subsystem
entries 0 through 10 of the TLB, write 11 to the base pointer field and load
the victim pointer field with a value from 11 to 31.
3) Enable the table walking logic by setting the TWL_EN bit in the Control
Register (CNTL_REG).
Locking entries in the TLB does not protect against a TLB global flush
operation. Therefore, when locking entries in the TLB, it is recommended that
all locked entries be written with their preserved bit set. Section 6.2.2.2
describes the process for writing entries into the TLB.
Entries in the TLB can be read by using the victim pointer to specify the entry
number. The entry
(READ_CAM_H_REG, READ_CAM_L_REG, READ_RAM_H_REG, and
READ_RAM_L_REG).
To read an entry from the TLB, follow these steps:
1) Disable the table walking logic by clearing the TWL_EN bit in the Control
Register (CNTL_REG).
2) Select the TLB entry to be read by setting the victim pointer through the
Lock/Protect Entry Register (LOCK_REG). For example, to read entry 0,
write 0 to the victim pointer field in the Lock/Protect Register.
3) Set the read TLB-entry bit in the Read/Write TLB Entry Register
(LD_TLB_REG).
4) Read the CAM and RAM parameters from the CAM and RAM read registers
(READ_CAM_H_REG, READ_CAM_L_REG, READ_RAM_H_REG, and
READ_RAM_L_REG).
5) Enable the table walking logic by setting the TWL_EN bit in the Control
Register (CNTL_REG). This step can be skipped if the table walking logic
is not being used.
Section 6.5 summarizes the relevant TLB control registers.
Two mechanisms exist to delete (flush) TLB entries. Invoking a TLB global
flush deletes all unpreserved TLB entries (TLB entries that were written with
the preserved bit as zero). The flush is invoked by setting the global flush bit
in the TLB Global Flush Register (GFLUSH_REG).
An individual TLB entry can be flushed, regardless of its preserved bit setting,
by selecting it using the victim pointer (LOCK_REG) and setting the flush entry
is read via the CAM/RAM read registers
SPRU890A