Texas Instruments OMAP5910 Reference Manual page 25

SPRU890A
There are three hardware accelerators included along with the C55x DSP
core:
DCT/IDCT Accelerator: This hardware accelerator implements Forward
-
and Inverse DCT algorithms. These DCT/IDCT algorithms can enable a
wide range of video compression standards including JPEG
Encode/Decode,
Encode/Decode.
Motion Estimation Accelerator: This hardware accelerator implements a
-
high-performance motion estimation algorithm, enabling MPEG Video
encoder or H.26x encoder applications. Motion estimation is typically one
of the most computation-intensive operations in video-encoding systems.
Pixel Interpolation Accelerator: This hardware accelerator enables
-
high-performance pixel-interpolation algorithms, which allow for powerful
fractal pixel motion estimation when used in conjunction with the Motion
Estimation Accelerator. Such algorithms provide significant improvement
to video-encoding applications.
Detailed information on the C55x Hardware Accelerators can be found in the
TMS320C55x Hardware
Programmer's Reference (SPRU098).
MPEG Video Encode/Decode,
Extensions for
C55x DSP Core Overview
and H.26x
Image/Video Applications
DSP Subsystem 25