First-Level Translation Table - Texas Instruments OMAP5910 Reference Manual

6.2.5

First-Level Translation Table

SPRU890A
Two types of second-level tables can be used:
Coarse page tables with 256 entries.
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Each entry in a coarse page table contains a descriptor which describes
the translation information for either a large page (64KB) or a small page
(4KB) of memory.
Notice that 256 small pages is the equivalent of a section, yet 256 large
pages is the equivalent of 16 sections. As described in section 6.2.6.5, the
descriptor must be copied 16 times in the course page table when using a
descriptor to map a large page.
Fine page tables with 1024 entries.
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Each entry in a fine page table contains a descriptor which contains the
translation information for either a large page (64KB), a small page (4KB),
or a tiny page (1KB) of memory.
As for coarse page tables, descriptors used to map large pages must be
copied 64 times in the fine page table and descriptors used to map small
pages must be copied 16 times. This requirement is described in section
6.2.6.6.
One of the most important parameters in developing a table-based address
translation scheme is the memory page size, that is, the size of the memory
region described by each translation table entry. Using large pages results in
a smaller translation table, whereas using small pages greatly increases the
efficiency of dynamic memory allocation and defragmentation. However, this
small size also implies more complex (and larger) translation tables.
Sections 6.2.5 and 6.2.6 describe the structure of the first- and second-level
translation tables, as well as the descriptors format.
The first-level translation table describes the translation properties of the DSP
subsystem virtual address space by dividing it into 1M-byte sections. Sixteen
sections are needed to encompass the entire 16M-byte virtual address space.
The translation table contains sixteen entries, each of which carries a four-byte
first-level descriptor.
Figure 36 shows the virtual address space of the DSP subsystem divided into
sections and their relationship to the entries in the first-level translation table.
Virtual memory address range 0x00 0000 through 0x02 8000 corresponds to
the DSP subsystem internal memory; therefore, section 0 is not a full 1MB. The
DSP MMU only controls the mapping of addresses considered external to the
DSP subsystem.
DSP Memory Management Unit
DSP Subsystem 83