Texas Instruments OMAP5910 Reference Manual page 183

DSP DMA
When DINDXMD = 0 (the default forced by a DSP subsystem reset), a
compatibility mode is selected. In the original DMA controller design, the
source and the destination shared one element index register called DMACEI
and one frame index register called DMACFI. When DINDXMD = 0,
compatible behavior is enabled; DMACSEI is used as DMACEI, and
DMACSFI is used as DMACFI. The destination index registers are not used.
When DINDXMD=1, an enhanced mode is selected. In this mode, the source
index registers are used only for the source, and the destination index
registers are used for the destination.
The element and frame indexes are 16-bit signed numbers, providing the
following range:
−32768 bytes ≤ frame index ≤ 32767 bytes
−32768 bytes ≤ element index ≤ 32767 bytes
After each transfer, the source and destination address registers contain the
address for the last byte of the transferred element. For example, if the DMA
channel is reading a 32-bit element at byte address 0x2000, the source
address will be 0x2003 after the element is read because the DMA channel
will read a total of four bytes. If the DMA channel reads a 16-bit element, the
source address would be 0x2001 after the element read because only two
bytes are read. For a byte read, the source address would stay at 0x2000 after
the byte read.
When the single index mode is used, the element index is added to the source
or destination address at the end of each element transfer. The modified
address will then be used at the beginning of the next element transfer.
When the double index mode is used for the source or the destination address,
the element index is added to the source or destination address at the end of
each element transferred as described above, except for the last element in
the frame. For the last element in the frame, the frame index is added to the
source or destination address instead of the element index. For example, if the
last element in the frame starts at byte address 0x801E where the data type
is 16-bit and the frame index is set to 0x0003, the DMA controller will move the
first byte (0x801E), then the second byte (0x801F) of the element. The frame
index will then be added to 0x801F to create the address for the first byte of
the next element to be moved (0x801F + 0x0003 = 0x8022).
The element index that is added to the source or destination address must
produce an aligned address according to the data type selected in the
DATATYPE field of DMACSDP. Therefore, only certain values are valid for the
element index.
SPRU890A DSP Subsystem 183