Texas Instruments OMAP5910 Reference Manual page 167

Table 63. DMA Channel Control Register (DMACCR) Field Descriptions (Continued)
Bits Field
11 ENDPROG
10 Reserved
SPRU890A
Value Description
End-of-programming bit. Each DMA channel has two sets of registers:
configuration registers and working registers. When block transfers
occur repeatedly because of auto-initialization (AUTOINIT = 1), you
can change the context for the next DMA transfer by writing to the
configuration registers during the current block transfer. At the end of
the current transfer, the contents of the configuration registers are
copied into the working registers, and the DMA controller begins the
next transfer using the new context. For proper auto-initialization, the
DSP core must finish programming the configuration registers before
the DMA controller copies their contents.
The DMA controller automatically clears the ENDPROG bit after
copying the configuration registers to the working registers. The DSP
core can then program the DMA channel context for the next iteration
of the transfer by programming the configuration registers.
To make sure auto-initialization waits for the DSP core, follow this
procedure:
1) Make auto-initialization wait for ENDPROG = 1 by clearing the
REPEAT bit (REPEAT = 0).
2) Poll for ENDPROG = 0, which indicates that the DMA controller
has finished copying the previous context. The configuration
registers can now be programmed for the next iteration.
3) Program the configuration registers.
4) Set ENDPROG (ENDPROG = 1) to indicate the end of register
programming.
0 The configuration registers are ready for programming, or
programming is in progress.
1 End of programming. The programming of the configuration registers
is complete.
0 This reserved bit must be kept 0. Make sure that whenever your
program modifies DMACCR, it writes a 0 to bit 10.
DSP DMA
DSP Subsystem 167