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33.2.5 OHCI Interrupts
The USB1.1 host controller is controlled by the ARM. It has the ability to interrupt the processor.
33.2.6 USB1.1 Host Controller Access to System Memory
The USB1.1 module needs to access system memory to read and write the OHCI data structures and
data buffers associated with USB traffic. The switch fabric allows the USB1.1 host controller to access
system memory.
33.2.7 Physical Addressing
Transactions on the internal bus use physical addresses, so all system memory accesses initiated by the
USB1.1 host controller must use physical addresses. The CPU can be configured to use virtual
addressing. In this case, software manipulates virtual addresses that may or may not be identical to
physical addresses. When virtual addressing is used, system software must perform the appropriate
virtual address to physical address and physical address to virtual address conversions when
manipulating the USB1.1 host controllers data structures and pointers to those data structures.
Figure 33-1
shows the virtual address to physical address conversion.
Figure 33-1. Relationships Between Virtual Address Physical Address
SPRUH82C – April 2013 – Revised September 2016
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Processor
MMU
Processor
physical
address
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00000000h
FFFFFFFFh
Processor
virtual
address
Universal Serial Bus OHCI Host Controller
Architecture
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